1. Technical Field
Various embodiments of the inventive concept relate to a semiconductor integrated circuit device, and more particularly, to a three-dimensional (3D) semiconductor device and a method of manufacturing the same.
2. Related Art
With the rapid development of mobile and digital information communication and the consumer-electronic industry, studies on existing electronic charge controlled-devices may encounter limitations. Thus, new functional memory devices of novel concepts other than the existing electronic charge devices may be developed. In particular, next-generation memory devices with large capacities, ultra-high speed, and ultra-low power may be developed to satisfy demands for large capacity memories of main information apparatuses.
Resistance variable memory devices using a resistance device as a memory medium have been suggested as the next-generation memory devices. Typical examples of resistive variable memory devices are phase-change random access memories (PCRAMs), resistance RAMs (ReRAMs), or magentoresistive RAMs (MRAMs).
A resistive memory device may be formed of a switching device and a resistance device and may store data “0” or “1,” according to a state of the resistance device
Even in the resistive variable memory devices, the first priority is to improve integration density and to integrate as many memory cells as possible in a limited area.
Currently, methods of forming the resistance variable memory devices in a 3D structure are suggested, and demands for methods of stably stacking a plurality of memory cells with a narrow critical dimension are growing.
As a manufacturing method of a typical 3D structure resistance variable memory device, there is a method for manufacturing a switching device using a vertical pillar. However, the method for manufacturing a switching device using the vertical pillar may have a concern in that a fabrication process of the switching device is complex, and an aspect ratio is increased due to a height of the vertical pillar, and thus the semiconductor device may become structurally unstable.
To overcome this concern of the 3D vertical pillar structure, a 3D lateral channel structure is suggested. The 3D lateral channel structure is a structure in which an active region having a lateral channel (a lateral fin structure or a lateral channel region) in a 3D structure is formed on a semiconductor substrate unlike an existing buried type. In this 3D lateral channel semiconductor device, in general, the lateral fin structure is electrically coupled to the semiconductor substrate through a common source node.
However, a method of supporting a floating lateral channel region through a common source node having a pattern structure may be structurally unstable. Further, since current is transferred through the common source node, current bottleneck may occur.